ResearchBib Share Your Research, Maximize Your Social Impacts
Sign for Notice Everyday Sign up >> Login

FPGA To PC Ethernet Communication Using Media Independent Interface (MII) Mode

Journal: International Journal for Scientific Research and Development | IJSRD (Vol.3, No. 11)

Publication Date:

Authors : ; ; ; ;

Page : 535-538

Keywords : FPGA; Ethernet; UDP; MII; GMII;

Source : Downloadexternal Find it from : Google Scholarexternal


As the advancement in the embedded system technology, Field programmable gate array (FPGA) based systems are playing significant role. In many application there is need of high speed communication between FPGA and external world (e.g.-for providing the data of a sensor to the web server in some real time embedded system). In initial phase of development of FPGA Board we had used Universal asynchronous receiver transmitter (UART) for communicating the FPGA to other devices but its speed is too slow in order of thousands of bps. But nowadays modern FPGA board comes with high speed interfaces e.g. Ethernet and PCI Express. We can achieve data rate up to hundreds of Mbps. Ethernet communication provides the required bandwidth for most of the applications. This paper describes the transmission of User datagram protocol (UDP) frame from FPGA to computer via Ethernet. We used Digilent Atlys board which includes a Marvell Alaska Tri-mode PHY (88E1111) paired with a Halo HFJ11- 1G01E RJ-45 connector. It supports both Media independent interface (MII) and Gigabit Media independent interface (GMII) modes at 10/100/1000 Mbps. We used MII mode at 10 Mbps data rate which is default set at power on or reset. For implementation and simulation we used Xilinx ISE Design Suite (version14.2).

Last modified: 2016-02-05 20:38:27