Archived Papers for Journal
International Journal of Electronics and Communication Engineering and Technology (IJECET) >>
Vol.6, No.8
Publisher: IAEME Publication
Publishing Date: 2015-08-30
- PROPOSING A MECHANISM AND INTERNAL DESIGN OF SYNCHRONOUS COUNTERS FOR DISPLAYING DECIMAL VALUES ON SEVEN SEGMENT DISPLAYSAuthors: BAWAR A. ABDALLA AZHI A. FARAJ; ZHENAR SH. FAEQ
- ESP 8266: A BREAKTHROUGH IN WIRELESS SENSOR NETWORKS AND INTERNET OF THINGSAuthors: MANAN MEHTA
- MINIMALLY BUFFERED DEFLECTION ROUTER INTERCONNECT WITH PREDICTION, IN NETWORK-ON-CHIP WITH FPGA IMPLEMENTATIONAuthors: ROSHNI SADASHIV KOLPE; S. R. GULHANE
- CONGESTION CONTROL FOR SCALABILITY IN BUFFERLESS ON-CHIP NETWORKS WITH FPGA IMPLEMENTATIONAuthors: RUCHIRA PRADEEP PAWAR; S D SHIRBAHADURKAR
- BAND PASS DESIGN WITH FLOATING RESISTOR SIMULATION APPLICATION AS FEEDBACK USING OPERATIONAL TRANSCONDUCTANCE AMPLIFIERAuthors: MANJULA V. KATAGERI; M. M. MUTSADDI; RAJESHWARI S. MATHAD